Search results for:
Filter your results
0 Search results
Nuno Miguel Paulino
I received my Master's Degree from FEUP (Faculdade de Engenharia da Universidade do Porto), in Electrical and Computer Engineering. My thesis was titled Generation of Reconfigurable Circuits from Machine Code, a work which continued throughout my PhD in Electrical and Computer Engineering, also at FEUP, and in association with INESC-TEC.
Having completed my PhD thesis, Generation of Custom Run-time Reconfigurable Hardware for Transparent Binary Acceleration, I am now a post-doc researcher with INESC-TEC on the topic of special compilers for hardware, and also an Auxiliary Assistant Professor with the Department of Informatics at FEUP.
Projects
Publications
A Deep Learning Approach in RIS-based Indoor Localization
Aguiar, RA;Paulino, N;Pessoa, LM;
2024
2024 JOINT EUROPEAN CONFERENCE ON NETWORKS AND COMMUNICATIONS & 6G SUMMIT, EUCNC/6G SUMMIT 2024
SpecRF-Posture: Exploring Specular Reflections for Human Posture Recognition
Oliveira, M;Ribeiro, FM;Paulino, N;Yurduseven, O;Pessoa, LM;
2024
IEEE International Mediterranean Conference on Communications and Networking, MeditCom 2024, Madrid, Spain, July 8-11, 2024
Using Source-to-Source to Target RISC-V Custom Extensions: UVE Case-Study
Henriques, M;Bispo, J;Paulino, N;
2024
PROCEEDINGS OF THE RAPIDO 2024 WORKSHOP, HIPEAC 2024
A DSL and MLIR Dialect for Streaming and Vectorisation
da Silva, MC;Sousa, L;Paulino, N;Bispo, J;
2024
APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2024
Supervised Theses
Smart Garment with integrated IMU for monitoring physical activity
Luis Eduardo Ruano Argueta
M - 2024
UP-FEUP
